Recorded talk

NVIDIA Blackwell: The Journey From Die to Data Center

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Summary

The talk traces Blackwell from wafer fabrication to rack-scale AI systems: hundreds of lithography steps build roughly 200 billion transistors on a 12in wafer, which are scribed into dies, tested, packaged, and stress-tested. A chip-on-wafer-on-substrate flow bonds 32 Blackwell dies and 128 HBM stacks onto a custom silicon interposer, producing the B200 Super Chip after molding and curing. System integration uses automated PCB assembly, custom liquid cooling, ConnectX7 SuperNICs and BlueField‑3 DPUs, and Nvidia's MVLink fabric (14.4 TB/s per switch tray, 130 TB/s backplane) to present up to 72 Blackwells (144 dies) as a single giant virtual GPU. The result is a 1.8-ton, rack-scale AI supercomputer assembled from 1.2 million components and validated with high-temperature stress tests, with reliability and thermal management emphasized as production guardrails.

Key technical points

Wafer fabrication: hundreds of chip processing and ultraviolet lithography steps assemble approximately 200 billion transistors layer-by-layer on a 12in wafer.
Wafer scribing and selection: the wafer is scribed into individual Blackwell dies, which are tested and sorted to separate good dies for downstream processes.
Packaging (chip-on-wafer-on-substrate): at TSMC SPIL and Amcore, 32 Blackwell dies and 128 HBM stacks are attached onto a custom silicon interposer wafer.
Interposer metal interconnects: metal interconnect traces are etched directly into the silicon interposer to connect Blackwell GPUs and HBM stacks into each system and package unit.
Super Chip assembly: the assembled interposer and components are baked, molded, and cured to create the Blackwell B200 Super Chip.
Stress and qualification: each Blackwell is stress tested at KYC in ovens at 125° C and pushed to its limits for several hours as a production validation step.
PCB assembly automation: at Foxconn, robots pick-and-place over 10,000 components onto the Grace Blackwell PCB, with additional components prepared at factories worldwide.
Thermal management: custom liquid-cooling copper blocks from Cooler Master, ABC, Auras, and Delta are used to keep chips at optimal temperatures.
Networking and offload: ConnectX7 SuperNICs enable scale-out communications while BlueField‑3 DPUs offload and accelerate networking, storage, and security tasks.
Integration into compute trays: all parts converge and are carefully integrated into GB200 compute trays during system assembly.
MVLink fabric: MVLink is a proprietary high-speed link to connect multiple GPUs into a massive virtual GPU; an MVLink switch tray with MVLink switch chips provides 14.4 TB/s of all-to-all bandwidth.
Backplane scale: MVLink spines and a custom blind‑mated backplane integrate 5,000 copper cables to deliver 130 TB/s of all-to-all bandwidth, connecting 72 Blackwells or 144 GPU dies into one giant GPU.
Supply chain and assembly scale: parts arrive from multiple global partners (Foxconn, Wistrun, Quanta, Dell, Asus, Gigabyte, HPE, Super Micro, and others) and are assembled into a rack-scale AI supercomputer totaling 1.2 million components, 2 m of copper cable, 130 trillion transistors, weighing 1,800 kg.
Production emphasis: the end-to-end flow highlights precision manufacturing, automated assembly, thermal design, specialized networking/offload, and high-temperature stress testing as key production guardrails.

Engineering relevance

For software and AI engineers the transcript surfaces concrete hardware constraints and enabling technologies to design for: MVLink bandwidth figures (14.4 TB/s per switch tray, 130 TB/s backplane) and the claim of a single virtual GPU aggregating 72 Blackwells/144 dies are primary determinants of how large-scale model parallelism and collective communication can be mapped. HBM stack integration on a silicon interposer defines the memory subsystem and bandwidth available to workloads. BlueField‑3 DPUs and ConnectX7 SuperNICs indicate a shift of networking, storage, and security functions off the host CPU, affecting where to place dataplane services and telemetry. Thermal management (custom liquid cooling) and rigorous stress testing (125° C ovens) are explicit production guardrails that constrain power envelopes and reliability guarantees. Finally, automated high-volume PCB assembly and a multi-vendor supply chain define production throughput and system integration paths that software teams must account for when scheduling deployments and validation.

Japan relevance

Japanese software and AI engineering teams should note the concrete hardware capabilities and integration practices demonstrated: very high all-to-all GPU fabric bandwidth (MVLink) for scaling large models, DPUs (BlueField‑3) for offloading networking and storage workloads, and HBM-on-interposer packaging that drives memory bandwidth. Thermal and reliability practices (custom liquid cooling, 125° C stress tests) set operational requirements for datacenter deployment. The system-level assembly across global partners and heavy automation suggests procurement and integration channels (Quanta, Dell, HPE, Supermicro, etc.) relevant to building or consuming similar rack-scale systems in Japan.

Full transcript

Transcript

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[Music] Blackwell is an engineering marvel. It begins as a blank silicon wafer at [Music] TSMC. Hundreds of chip processing and ultraviolet lithography steps build up each of the 200 billion transistors layer by layer on a 12in wafer. The wafer is scribed into individual blackwell dye, tested and sorted, separating the good dyes to move forward. The chip on wafer on substrate process done at TSMC spill and amcore attaches 32 Blackwell dyes and 128 HBM stacks on a custom silicon interposer wafer. Metal interconnect traces are etched directly into it, connecting Blackwell GPUs and HBM stacks into each system and package unit, locking everything into place. Then the assembly is baked, molded, and cured, creating the Blackwell B200 Super Chip. At KYC, each Blackwell is stress tested in ovens at 125° C and pushed to its limits for several hours. Back at Foxcon, robots work around the clock to pick and place over 10,000 components onto the Grace Blackwell PCB. Meanwhile, additional components are being prepared at factories across the globe. Custom liquid cooling copper blocks from Cooler Master, ABC, Auras, and Delta keep the chips at optimal temperatures. At another Foxconom facility, Connect X7 Supernicks are built to enable scale out communications and Bluefield 3DPUs to offload and accelerate networking, storage, and security tasks. All these parts converge to be carefully integrated into GB200 compute trades. [Music] MVLink is the breakthrough high-speed link that Nvidia invented to connect multiple GPUs and scale up into a massive virtual GPU. The MVLink switch tray is constructed with MVLink switch chips providing 14.4 terabytes per second of all toall bandwidth. MVLink spines form a custom blindmated back plane integrating 5,000 copper cables to deliver 130 terabytes per second of all to all bandwidth. This connects all 72 black wells or 144 GPU dyes into one giant GPU from around the world. parts arrive from Foxcon, Wistrun, Quanta, Dell, Asus, Gigabyte, HPE, Super Micro and other partners to be assembled by skilled technicians into a rack scale AI supercomput in total 1.2 million components, 2 m of copper cable, 130 trillion transistors, weighing 1,800 kg. From the first transistor etched into a wafer to the last bolt fastening the Blackwell rag, every step carries the weight of our partners' dedication, precision, and craft. Blackwell is more than a technological wonder. It's a testament to the marvel of the Taiwan technology ecosystem. [Music] We couldn't be prouder of what we've achieved [Music] together. Thank you, Taiwan.